1. Field of the Invention
The present invention generally relates to a method for manufacturing a semiconductor device, and a wafer level package on which the semiconductor device is mounted.
2. Description of the Related Art
In manufacturing integrated circuits, a process referred to as trimming is used for adjusting (modifying) characteristic values of an integrated circuit (e.g., resistance value). The trimming process is performed on a target trimming device provided on the same plane of an integrated circuit plane. By performing the trimming process, the status of a circuit (open state, short-circuited state) is changed. For example, with a Zener zap method, a circuit is changed from an open state to a short-circuited state by using a Zener diode in a circuit. With a polysilicon fuse method, a fuse of polysilicon is changed from a short-circuited state to an open state. As for other trimming processes, there is a laser cutting method.
FIGS. 1A-1C are schematic diagrams for describing conventional trimming processes. FIG. 1A is for describing the Zener zap method. In a case where a reverse voltage is applied to a PN junction diode 11 (see upper part of FIG. 1A) and a Zener breakdown is generated by overvoltage, a permanent conductive state is created at a location 12 of the PN junction diode 11 (see lower part of FIG. 1A). Accordingly, in a case where a predetermined location of a wiring of an integrated circuit is required to be in a conductive state, a trimming process is performed by providing the PN junction diode 11 at the predetermined location of the integrated circuit.
FIG. 1B is for describing the polysilicon fuse method. In a case where overcurrent is allowed to flow through a polysilicon resistor element 13 (see upper part of FIG. 1B) formed on a silicon oxide film and heated to a temperature equal to or more than a melting point, the polysilicon resistor element 13 is melted off (see lower part of FIG. 1B). Accordingly, in a case where a predetermined location of a wiring of an integrated circuit is required to be in an open state, the trimming process (polysilicon fuse method) is performed by providing the polysilicon resistor element 13 at the predetermined location of the integrated circuit.
FIG. 1C is for describing the laser cutting method. In a case where a laser beam is irradiated to a fuse element 14 (see upper part of FIG. 1C) provided at a portion of an integrated circuit, the fuse element 14 is cut off (see lower part of FIG. 1C). Accordingly, in a case where a predetermined location of an integrated circuit is required to be in an open state, a trimming process (laser cutting method) is performed by providing the fuse element 14 at the predetermined location of the integrated circuit (See, for example, Japanese Laid-Open Patent Publication No. 2001-230374).
FIG. 2A is a schematic diagram and FIG. 2B is a table for describing a trimming process by using the laser cutting method, respectively. According to FIGS. 2A and 2B, an integrated circuit can be made open by melting off the fuses corresponding to No. 2 and No. 4. Thereby, the resistance values of the integrated circuit can be controlled within permissible design values.
Further, as for methods besides heating and melting fuses, there is a method of adjusting characteristic values of a circuit (e.g., resistance values) by arranging connection wiring between resistors in an integrated circuit. That is, after forming semiconductor elements, and measuring resistance values of the semiconductor elements, connection wiring may be formed between resistors on an integrated circuit (including the processes of forming an interlayer insulation film and through-holes using various masks, depositing/processing an aluminum film) in the middle of a semiconductor device manufacturing process based on the measured resistance values (see, for example, Japanese Laid-Open Patent Publication No. 2007-227478).
The conventional trimming processes using methods such as the Zener zap method or the polysilicon fuse method electrically destroys the target trimming elements formed on the same plane of an integrated circuit by applying high voltage or by allowing high electric current to flow with respect to the target trimming elements. The target trimming elements are to be arranged sufficiently spaced apart from each other on an integrated circuit for preventing other circuit elements from being thermally or electrically affected by the target trimming elements. This causes the area of the integrated circuit to increase and causes difficulty in achieving high density integration.
Although the use of the laser cutting method does not require high voltage or high current for destroying target trimming elements, positioning regions for performing laser irradiation and regions used for forming elements besides the integrated circuit (e.g., regions for forming openings for passing a laser beam through) are required to be formed on the same plane of the semiconductor circuit. Therefore, the size of the semiconductor circuit cannot be sufficiently reduced. Further, because the laser cutting method requires equipment for performing the trimming process and additional procedures for performing the trimming process, it is difficult to reduce manufacturing costs and simplify the manufacturing process.
Although target trimming elements are not melted off in a case of using a method of newly forming connection wiring (e.g., aluminum) between resistors, this method is unable to reduce manufacturing costs or simplify the manufacturing process because this method requires plural masks and forming wirings.
As another method, there is a method of changing a redistribution wiring configuration by performing wafer level packaging (WLP) on a semiconductor integrated circuit. However, the method of changing the redistribution wiring configuration is unable to reduce manufacturing costs and to simplify the manufacturing process because the method requires plural masks and forming wiring (e.g., plating) in order for the semiconductor circuit to attaining characteristic values within a permissible range.